From 94b856ef9afaca880909d22b24d5443408c47920 Mon Sep 17 00:00:00 2001
From: Lee Leahy <leroy.p.leahy@intel.com>
Date: Thu, 15 Oct 2015 12:07:03 -0700
Subject: FSP 1.1: Move common FSP code

Move the FSP common code from the src/soc/intel/common directory into
the src/drivers/intel/fsp1_1 directory.  Rename the Kconfig values
associated with this common code.

BRANCH=none
BUG=None
TEST=Build and run on kunimitsu

Change-Id: If1ca613b5010424c797e047c2258760ac3724a5a
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: e8228cb2a12df1cc06646071fafe10e50bf01440
Original-Change-Id: I4ea84ea4e3e96ae0cfdbbaeb1316caee83359293
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/306350
Original-Commit-Ready: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/12156
Tested-by: build bot (Jenkins)
Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
---
 src/soc/intel/braswell/Kconfig                | 8 ++++----
 src/soc/intel/braswell/cpu.c                  | 2 +-
 src/soc/intel/braswell/include/soc/acpi.h     | 2 +-
 src/soc/intel/braswell/include/soc/ramstage.h | 2 +-
 src/soc/intel/braswell/include/soc/romstage.h | 2 +-
 src/soc/intel/braswell/memmap.c               | 2 +-
 src/soc/intel/braswell/northcluster.c         | 2 +-
 src/soc/intel/braswell/ramstage.c             | 1 -
 8 files changed, 10 insertions(+), 11 deletions(-)

(limited to 'src/soc/intel/braswell')

diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 5a41056103..e6f22755ad 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -17,6 +17,10 @@ config CPU_SPECIFIC_OPTIONS
 	select COLLECT_TIMESTAMPS
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED
+	select FSP_RAM_INIT
+	select FSP_ROMSTAGE
+	select FSP_STACK
+	select FSP_STAGE_CACHE
 	select HAS_PRECBMEM_TIMESTAMP_REGION
 	select HAVE_MONOTONIC_TIMER
 	select HAVE_SMI_HANDLER
@@ -33,11 +37,7 @@ config CPU_SPECIFIC_OPTIONS
 	select REG_SCRIPT
 	select SOC_INTEL_COMMON
 	select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE
-	select SOC_INTEL_COMMON_FSP_RAM_INIT
-	select SOC_INTEL_COMMON_FSP_ROMSTAGE
 	select SOC_INTEL_COMMON_RESET
-	select SOC_INTEL_COMMON_STACK
-	select SOC_INTEL_COMMON_STAGE_CACHE
 	select SMM_TSEG
 	select SMP
 	select SPI_FLASH
diff --git a/src/soc/intel/braswell/cpu.c b/src/soc/intel/braswell/cpu.c
index 41a43ee50b..8d1ae815ae 100644
--- a/src/soc/intel/braswell/cpu.c
+++ b/src/soc/intel/braswell/cpu.c
@@ -28,7 +28,7 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
-#include <soc/intel/common/memmap.h>
+#include <fsp/memmap.h>
 #include <reg_script.h>
 #include <soc/iosf.h>
 #include <soc/msr.h>
diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h
index d54ff66abd..70a5c71cd9 100644
--- a/src/soc/intel/braswell/include/soc/acpi.h
+++ b/src/soc/intel/braswell/include/soc/acpi.h
@@ -25,7 +25,7 @@
 #include <soc/nvs.h>
 
 #if CONFIG_GOP_SUPPORT
-#include <soc/intel/common/gma.h>
+#include <fsp/gma.h>
 int init_igd_opregion(igd_opregion_t *igd_opregion);
 #endif
 
diff --git a/src/soc/intel/braswell/include/soc/ramstage.h b/src/soc/intel/braswell/include/soc/ramstage.h
index f1712433db..9b40db6334 100644
--- a/src/soc/intel/braswell/include/soc/ramstage.h
+++ b/src/soc/intel/braswell/include/soc/ramstage.h
@@ -23,7 +23,7 @@
 
 #include <chip.h>
 #include <device/device.h>
-#include <soc/intel/common/ramstage.h>
+#include <fsp/ramstage.h>
 
 /*
  * The soc_init_pre_device() function is called prior to device
diff --git a/src/soc/intel/braswell/include/soc/romstage.h b/src/soc/intel/braswell/include/soc/romstage.h
index 0f24f71c9f..6dfe8a82c4 100644
--- a/src/soc/intel/braswell/include/soc/romstage.h
+++ b/src/soc/intel/braswell/include/soc/romstage.h
@@ -23,10 +23,10 @@
 
 #include <stdint.h>
 #include <arch/cpu.h>
+#include <fsp/romstage.h>
 #include <fsp/util.h>
 #include <soc/pei_data.h>
 #include <soc/pm.h>
-#include <soc/intel/common/romstage.h>
 
 void gfx_init(void);
 void tco_disable(void);
diff --git a/src/soc/intel/braswell/memmap.c b/src/soc/intel/braswell/memmap.c
index 52bba3e96f..24e8b3b8bb 100644
--- a/src/soc/intel/braswell/memmap.c
+++ b/src/soc/intel/braswell/memmap.c
@@ -21,7 +21,7 @@
 #include <arch/io.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <soc/intel/common/memmap.h>
+#include <fsp/memmap.h>
 #include <soc/iosf.h>
 #include <soc/smm.h>
 
diff --git a/src/soc/intel/braswell/northcluster.c b/src/soc/intel/braswell/northcluster.c
index 390e050ab8..67af0879c8 100644
--- a/src/soc/intel/braswell/northcluster.c
+++ b/src/soc/intel/braswell/northcluster.c
@@ -25,8 +25,8 @@
 #include <device/device.h>
 #include <device/pci.h>
 #include <device/pci_ids.h>
+#include <fsp/memmap.h>
 #include <fsp/util.h>
-#include <soc/intel/common/memmap.h>
 #include <soc/iomap.h>
 #include <soc/iosf.h>
 #include <soc/pci_devs.h>
diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c
index 2454c6b141..c6e89364c0 100644
--- a/src/soc/intel/braswell/ramstage.c
+++ b/src/soc/intel/braswell/ramstage.c
@@ -40,7 +40,6 @@
 #include <soc/pm.h>
 #include <soc/ramstage.h>
 #include <soc/intel/common/acpi.h>
-#include <soc/intel/common/ramstage.h>
 #include <boardid.h>
 #include <stdlib.h>
 
-- 
cgit v1.2.3