From 4abc73183134def757c553aa4eb195fffa824100 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Tue, 12 Jan 2021 17:46:30 +0200 Subject: ACPI: Separate device_nvs_t MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Remove typedef device_nvs_t and move struct device_nvs outside of global_nvs. Also remove padding and the reserve for chromeos_acpi_t. Change-Id: I878746b1f0f9152a27dc58e373d58115e2dff22c Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/49476 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/braswell/lpe.c | 17 ++++++----------- 1 file changed, 6 insertions(+), 11 deletions(-) (limited to 'src/soc/intel/braswell/lpe.c') diff --git a/src/soc/intel/braswell/lpe.c b/src/soc/intel/braswell/lpe.c index 14be808136..59cabee707 100644 --- a/src/soc/intel/braswell/lpe.c +++ b/src/soc/intel/braswell/lpe.c @@ -12,7 +12,7 @@ #include #include #include -#include +#include #include #include #include @@ -53,20 +53,15 @@ static void lpe_enable_acpi_mode(struct device *dev) REG_SCRIPT_END }; - struct global_nvs *gnvs; - - /* Find ACPI NVS to update BARs */ - gnvs = acpi_get_gnvs(); - if (!gnvs) - return; + struct device_nvs *dev_nvs = acpi_get_device_nvs(); /* Save BAR0, BAR1, and firmware base to ACPI NVS */ - assign_device_nvs(dev, &gnvs->dev.lpe_bar0, PCI_BASE_ADDRESS_0); - assign_device_nvs(dev, &gnvs->dev.lpe_bar1, PCI_BASE_ADDRESS_2); - assign_device_nvs(dev, &gnvs->dev.lpe_fw, FIRMWARE_PCI_REG_BASE); + assign_device_nvs(dev, &dev_nvs->lpe_bar0, PCI_BASE_ADDRESS_0); + assign_device_nvs(dev, &dev_nvs->lpe_bar1, PCI_BASE_ADDRESS_2); + assign_device_nvs(dev, &dev_nvs->lpe_fw, FIRMWARE_PCI_REG_BASE); /* Device is enabled in ACPI mode */ - gnvs->dev.lpe_en = 1; + dev_nvs->lpe_en = 1; /* Put device in ACPI mode */ reg_script_run_on_dev(dev, ops); -- cgit v1.2.3