From e459a89f0f30e705c35855d49f62b67d87092f18 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 4 Mar 2019 07:22:56 +0200 Subject: soc/intel: Use simple PCI config access MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Call the simple PCI config accessors directly. Change-Id: I2c6712d836924b01c33a8435292be1ac2e530472 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31749 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Werner Zeh Reviewed-by: Nico Huber --- src/soc/intel/braswell/iosf.c | 20 ++++---------------- 1 file changed, 4 insertions(+), 16 deletions(-) (limited to 'src/soc/intel/braswell/iosf.c') diff --git a/src/soc/intel/braswell/iosf.c b/src/soc/intel/braswell/iosf.c index 7b5374a01e..5aa618164c 100644 --- a/src/soc/intel/braswell/iosf.c +++ b/src/soc/intel/braswell/iosf.c @@ -14,32 +14,20 @@ * GNU General Public License for more details. */ -#include +#include #include #include #include -#if ENV_RAMSTAGE -#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12)) - static inline void write_iosf_reg(int reg, uint32_t value) { - write32((void *)(IOSF_PCI_BASE + reg), value); -} -static inline uint32_t read_iosf_reg(int reg) -{ - return read32((void *)(IOSF_PCI_BASE + reg)); -} -#else -static inline void write_iosf_reg(int reg, uint32_t value) -{ - pci_write_config32(IOSF_PCI_DEV, reg, value); + pci_s_write_config32(IOSF_PCI_DEV, reg, value); } + static inline uint32_t read_iosf_reg(int reg) { - return pci_read_config32(IOSF_PCI_DEV, reg); + return pci_s_read_config32(IOSF_PCI_DEV, reg); } -#endif /* ENV_RAMSTAGE */ /* Common sequences for all the port accesses. */ static uint32_t iosf_read_port(uint32_t cr, int reg) -- cgit v1.2.3