From acb9c0b6616f96357c303964678eac05177a078d Mon Sep 17 00:00:00 2001
From: Lee Leahy <leroy.p.leahy@intel.com>
Date: Thu, 2 Jul 2015 11:55:18 -0700
Subject: Braswell: Update to end of June.

Remove some CamelCase in acpi.c
Add FSP PcdDvfsEnable configuration parameter.
Add lpc_init and lpc_set_low_power routines.
Remove Braswell reference to make code easier to port to another SOC.

BRANCH=none
BUG=None
TEST=Build and run on cyan

Change-Id: I5063215fc5d19b4a07f3161f76bf3d58e30f6f02
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10768
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
---
 src/soc/intel/braswell/include/soc/gpio.h     | 3 +++
 src/soc/intel/braswell/include/soc/iosf.h     | 1 +
 src/soc/intel/braswell/include/soc/nvs.h      | 3 ++-
 src/soc/intel/braswell/include/soc/pei_data.h | 2 +-
 4 files changed, 7 insertions(+), 2 deletions(-)

(limited to 'src/soc/intel/braswell/include')

diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h
index 20a4d51180..5dda732ea0 100644
--- a/src/soc/intel/braswell/include/soc/gpio.h
+++ b/src/soc/intel/braswell/include/soc/gpio.h
@@ -573,4 +573,7 @@ int get_gpio(int community_base, int pad0_offset);
 uint16_t gpio_family_number(uint8_t community, uint8_t pad);
 uint32_t *gpio_pad_config_reg(uint8_t community, uint8_t pad);
 
+void lpc_init(void);
+void lpc_set_low_power(void);
+
 #endif /* _SOC_GPIO_H_ */
diff --git a/src/soc/intel/braswell/include/soc/iosf.h b/src/soc/intel/braswell/include/soc/iosf.h
index 60763d9304..1cdfb8f587 100644
--- a/src/soc/intel/braswell/include/soc/iosf.h
+++ b/src/soc/intel/braswell/include/soc/iosf.h
@@ -21,6 +21,7 @@
 #ifndef _SOC_IOSF_H_
 #define _SOC_IOSF_H_
 
+#include <rules.h>
 #include <stdint.h>
 #if ENV_RAMSTAGE
 #include <device/device.h>
diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h
index 1c25cb295f..9492f2c61b 100644
--- a/src/soc/intel/braswell/include/soc/nvs.h
+++ b/src/soc/intel/braswell/include/soc/nvs.h
@@ -22,6 +22,7 @@
 #ifndef _SOC_NVS_H_
 #define _SOC_NVS_H_
 
+#include <rules.h>
 #include <vendorcode/google/chromeos/gnvs.h>
 #include <soc/device_nvs.h>
 
@@ -73,7 +74,7 @@ typedef struct {
 } __attribute__((packed)) global_nvs_t;
 
 void acpi_create_gnvs(global_nvs_t *gnvs);
-#ifdef __SMM__
+#if ENV_SMM
 /* Used in SMM to find the ACPI GNVS address */
 global_nvs_t *smm_get_gnvs(void);
 #endif
diff --git a/src/soc/intel/braswell/include/soc/pei_data.h b/src/soc/intel/braswell/include/soc/pei_data.h
index 67e34f7c98..50aabed66e 100644
--- a/src/soc/intel/braswell/include/soc/pei_data.h
+++ b/src/soc/intel/braswell/include/soc/pei_data.h
@@ -1,5 +1,5 @@
 /*
- * Braswell UEFI PEI wrapper
+ * UEFI PEI wrapper
  *
  * Copyright (C) 2014 Google Inc.
  *
-- 
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