From 66318aad07e6810065bc0668f4a1f34b7cb77687 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 4 May 2019 16:59:20 +0200 Subject: intel/fsp1_1: Move MRC cache pointers into `romstage_params` These are part of a common concept and not SoC specific. Change-Id: I9cb218d7825bd06a138f7f5d9e2b68e86077a3ec Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/coreboot/+/32589 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Patrick Rudolph Reviewed-by: Frans Hendriks --- src/soc/intel/braswell/include/soc/pei_data.h | 9 --------- 1 file changed, 9 deletions(-) (limited to 'src/soc/intel/braswell/include') diff --git a/src/soc/intel/braswell/include/soc/pei_data.h b/src/soc/intel/braswell/include/soc/pei_data.h index 7ea83ba8db..df18dc087a 100644 --- a/src/soc/intel/braswell/include/soc/pei_data.h +++ b/src/soc/intel/braswell/include/soc/pei_data.h @@ -43,15 +43,6 @@ struct pei_data { void *spd_data_ch1; uint8_t spd_ch0_config; uint8_t spd_ch1_config; - - /* Fast boot and S3 resume MRC data */ - int saved_data_size; - const void *saved_data; - int disable_saved_data; - - /* New save data from MRC */ - int data_to_save_size; - void *data_to_save; }; typedef struct pei_data PEI_DATA; -- cgit v1.2.3