From 153ae105e5c928982b50d1599e626ae6ff494824 Mon Sep 17 00:00:00 2001
From: Jenny TC <jenny.tc@intel.com>
Date: Thu, 18 Jun 2015 14:55:10 +0530
Subject: BCRD2: Enable PMIC SVID config

Enable PMIC SVID config for BCRD2 based
on board id. UPD parameter is used to
select the SVID config and PMIC I2C bus
number

BRANCH=None
BUG=None
TEST=Build and boot the system

Change-Id: I3c4c06bd25c241abdf46aa14af74eecf77cf77a6
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: 10bb8d4ad96d1187f6e135ca1535d70ae45ee887
Original-Change-Id: I9191db7bace4f4840e3c32381093c6c0806f7c32
Original-Signed-off-by: Jenny TC <jenny.tc@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/282156
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11060
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
---
 src/soc/intel/braswell/chip.h | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

(limited to 'src/soc/intel/braswell/chip.h')

diff --git a/src/soc/intel/braswell/chip.h b/src/soc/intel/braswell/chip.h
index d70aa9b117..7422bc4c09 100644
--- a/src/soc/intel/braswell/chip.h
+++ b/src/soc/intel/braswell/chip.h
@@ -30,8 +30,9 @@
 #include <fsp_util.h>
 #include <soc/pci_devs.h>
 
-#define SVID_CONFIG1	1
-#define SVID_CONFIG3	3
+#define SVID_CONFIG1		1
+#define SVID_CONFIG3		3
+#define SVID_PMIC_CONFIG	8
 
 struct soc_intel_braswell_config {
 	uint8_t enable_xdp_tap;
-- 
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