From 3bad4cb086276a0fef715a3e661b489c59e27e08 Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Tue, 25 Aug 2015 18:03:31 -0700 Subject: braswell: acpi: Allow DPTF thresholds to be defined at board-level Similar to Skylake, allow braswell mainboards to override the default DPTF thresholds. BUG=chrome-os-partner:43884 TEST=Build for Strago BRANCH=Strago Change-Id: Id2574e98c444b8bf4da8ca36f3eeeb06568e78e0 Signed-off-by: Patrick Georgi Original-Commit-Id: 799a7006e8fcacfea8e8e0de5c99c3ce3c4ac34f Original-Signed-off-by: Shawn Nematbakhsh Original-Change-Id: If69627163237674a28fb8a26b4ce1886e5dbfc17 Original-Reviewed-on: https://chromium-review.googlesource.com/296033 Original-Commit-Ready: Shawn N Original-Tested-by: Shawn N Original-Reviewed-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/11546 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/braswell/acpi/cpu.asl | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'src/soc/intel/braswell/acpi/cpu.asl') diff --git a/src/soc/intel/braswell/acpi/cpu.asl b/src/soc/intel/braswell/acpi/cpu.asl index 0ae51f2002..c9cb83b915 100644 --- a/src/soc/intel/braswell/acpi/cpu.asl +++ b/src/soc/intel/braswell/acpi/cpu.asl @@ -18,17 +18,6 @@ * Foundation, Inc. */ -/* CPU */ -#define DPTF_CPU_PASSIVE 80 -#define DPTF_CPU_CRITICAL 90 -#define DPTF_CPU_PASSIVE 80 -#define DPTF_CPU_CRITICAL 90 -#define DPTF_CPU_ACTIVE_AC0 90 -#define DPTF_CPU_ACTIVE_AC1 80 -#define DPTF_CPU_ACTIVE_AC2 70 -#define DPTF_CPU_ACTIVE_AC3 60 -#define DPTF_CPU_ACTIVE_AC4 50 - /* These devices are created at runtime */ External (\_PR.CP00, DeviceObj) External (\_PR.CP01, DeviceObj) -- cgit v1.2.3