From 8950cfb66f8f1fd4b047fbef2347134be0aeacec Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Sat, 13 Jul 2019 22:16:25 +0300 Subject: soc/intel: Use config_of() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I0727a6b327410197cf32f598d1312737744386b3 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34328 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: David Guckian --- src/soc/intel/baytrail/ehci.c | 4 ++-- src/soc/intel/baytrail/emmc.c | 2 +- src/soc/intel/baytrail/gfx.c | 2 +- src/soc/intel/baytrail/lpe.c | 4 ++-- src/soc/intel/baytrail/lpss.c | 2 +- src/soc/intel/baytrail/pcie.c | 8 ++++---- src/soc/intel/baytrail/romstage/pmc.c | 3 +-- src/soc/intel/baytrail/sata.c | 11 ++--------- src/soc/intel/baytrail/sd.c | 5 +---- src/soc/intel/baytrail/southcluster.c | 2 +- src/soc/intel/baytrail/xhci.c | 2 +- 11 files changed, 17 insertions(+), 28 deletions(-) (limited to 'src/soc/intel/baytrail') diff --git a/src/soc/intel/baytrail/ehci.c b/src/soc/intel/baytrail/ehci.c index 002d38c633..9082feaa16 100644 --- a/src/soc/intel/baytrail/ehci.c +++ b/src/soc/intel/baytrail/ehci.c @@ -88,7 +88,7 @@ static const struct reg_script ehci_hc_reset[] = { static void usb2_phy_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); u32 usb2_comp_bg = (config->usb2_comp_bg == 0 ? 0x4700 : config->usb2_comp_bg); struct reg_script usb2_phy_script[] = { @@ -123,7 +123,7 @@ static void usb2_phy_init(struct device *dev) static void ehci_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); struct reg_script ehci_hc_init[] = { /* Controller init */ REG_SCRIPT_NEXT(ehci_init_script), diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c index bf5a8dd42f..a99fe5a424 100644 --- a/src/soc/intel/baytrail/emmc.c +++ b/src/soc/intel/baytrail/emmc.c @@ -46,7 +46,7 @@ static const struct reg_script emmc_ops[] = { static void emmc_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); printk(BIOS_DEBUG, "eMMC init\n"); reg_script_run_on_dev(dev, emmc_ops); diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 2048c13824..4a799916db 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -313,7 +313,7 @@ static void set_backlight_pwm(struct device *dev, uint32_t bklt_reg, int req_hz) static void gfx_panel_setup(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); struct reg_script gfx_pipea_init[] = { /* CONTROL */ REG_RES_WRITE32(PCI_BASE_ADDRESS_0, PIPEA_REG(PP_CONTROL), diff --git a/src/soc/intel/baytrail/lpe.c b/src/soc/intel/baytrail/lpe.c index 1843f08073..9636640108 100644 --- a/src/soc/intel/baytrail/lpe.c +++ b/src/soc/intel/baytrail/lpe.c @@ -91,7 +91,7 @@ static void setup_codec_clock(struct device *dev) struct soc_intel_baytrail_config *config; const char *freq_str; - config = dev->chip_info; + config = config_of(dev); switch (config->lpe_codec_clk_freq) { case 19: freq_str = "19.2"; @@ -150,7 +150,7 @@ static void lpe_stash_firmware_info(struct device *dev) static void lpe_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); lpe_stash_firmware_info(dev); diff --git a/src/soc/intel/baytrail/lpss.c b/src/soc/intel/baytrail/lpss.c index a21a788134..4ffdca9d63 100644 --- a/src/soc/intel/baytrail/lpss.c +++ b/src/soc/intel/baytrail/lpss.c @@ -148,7 +148,7 @@ static void i2c_disable_resets(struct device *dev) static void lpss_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); int iosf_reg, nvs_index; dev_ctl_reg(dev, &iosf_reg, &nvs_index); diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c index 33c5455c50..b2b2d3c3b4 100644 --- a/src/soc/intel/baytrail/pcie.c +++ b/src/soc/intel/baytrail/pcie.c @@ -108,11 +108,11 @@ static void byt_pcie_init(struct device *dev) reg_script_run_on_dev(dev, init_script); if (is_first_port(dev)) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); uint32_t reg = pci_read_config32(dev, RPPGEN); reg |= SRDLCGEN | SRDBCGEN; - if (config && config->clkreq_enable) + if (config->clkreq_enable) reg |= LCLKREQEN | BBCLKREQEN; pci_write_config32(dev, RPPGEN, reg); @@ -208,13 +208,13 @@ static void check_device_present(struct device *dev) static void byt_pcie_enable(struct device *dev) { if (is_first_port(dev)) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); uint32_t reg = pci_read_config32(dev, PHYCTL2_IOSFBCTL); pll_en_off = !!(reg & PLL_OFF_EN); strpfusecfg = pci_read_config32(dev, STRPFUSECFG); - if (config && config->pcie_wake_enable) + if (config->pcie_wake_enable) southcluster_smm_save_param( SMM_SAVE_PARAM_PCIE_WAKE_ENABLE, 1); } diff --git a/src/soc/intel/baytrail/romstage/pmc.c b/src/soc/intel/baytrail/romstage/pmc.c index 596ed11fa4..882edf0a60 100644 --- a/src/soc/intel/baytrail/romstage/pmc.c +++ b/src/soc/intel/baytrail/romstage/pmc.c @@ -47,8 +47,7 @@ void punit_init(void) rid = pci_read_config8(IOSF_PCI_DEV, REVID); dev = pcidev_on_root(SOC_DEV, SOC_FUNC); - if (dev) - cfg = dev->chip_info; + cfg = config_of(dev); reg = iosf_punit_read(SB_BIOS_CONFIG); /* Write bits 17:16 of SB_BIOS_CONFIG in the PUNIT. */ diff --git a/src/soc/intel/baytrail/sata.c b/src/soc/intel/baytrail/sata.c index e7636fe4f4..084d7865b4 100644 --- a/src/soc/intel/baytrail/sata.c +++ b/src/soc/intel/baytrail/sata.c @@ -36,18 +36,13 @@ static inline void sir_write(struct device *dev, int idx, u32 value) static void sata_init(struct device *dev) { - config_t *config = dev->chip_info; + config_t *config = config_of(dev); u32 reg32; u16 reg16; u8 reg8; printk(BIOS_DEBUG, "SATA: Initializing...\n"); - if (config == NULL) { - printk(BIOS_ERR, "SATA: ERROR: Device not in devicetree.cb!\n"); - return; - } - if (!config->sata_ahci) { /* Set legacy or native decoding mode */ if (config->ide_legacy_combined) { @@ -158,14 +153,12 @@ static void sata_init(struct device *dev) static void sata_enable(struct device *dev) { - config_t *config = dev->chip_info; + config_t *config = config_of(dev); u8 reg8; u16 reg16; u32 reg32; southcluster_enable_dev(dev); - if (!config) - return; /* Port mapping -- mask off SPD + SMS + SC bits, then re-set */ reg16 = pci_read_config16(dev, 0x90); diff --git a/src/soc/intel/baytrail/sd.c b/src/soc/intel/baytrail/sd.c index cbdb7bb181..dcb20734e3 100644 --- a/src/soc/intel/baytrail/sd.c +++ b/src/soc/intel/baytrail/sd.c @@ -32,10 +32,7 @@ static void sd_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; - - if (config == NULL) - return; + struct soc_intel_baytrail_config *config = config_of(dev); if (config->sdcard_cap_low != 0 || config->sdcard_cap_high != 0) { printk(BIOS_DEBUG, "Overriding SD Card controller caps.\n"); diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 0289e8b4de..8f65433f05 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -177,7 +177,7 @@ static void sc_init(struct device *dev) u32 *gen_pmcon1 = (u32 *)(PMC_BASE_ADDRESS + GEN_PMCON1); u32 *actl = (u32 *)(ILB_BASE_ADDRESS + ACTL); const struct baytrail_irq_route *ir = &global_baytrail_irq_route; - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); /* Set up the PIRQ PIC routing based on static config. */ for (i = 0; i < NUM_PIRQS; i++) { diff --git a/src/soc/intel/baytrail/xhci.c b/src/soc/intel/baytrail/xhci.c index 6408cd9a9c..d9f2c53eaa 100644 --- a/src/soc/intel/baytrail/xhci.c +++ b/src/soc/intel/baytrail/xhci.c @@ -197,7 +197,7 @@ static void xhci_route_all(struct device *dev) static void xhci_init(struct device *dev) { - struct soc_intel_baytrail_config *config = dev->chip_info; + struct soc_intel_baytrail_config *config = config_of(dev); struct reg_script xhci_hc_init[] = { /* Initialize clock gating */ REG_SCRIPT_NEXT(xhci_clock_gating_script), -- cgit v1.2.3