From 78ba7a7865ed1f60c7f55bfcced305bc8fbdc9c6 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Mon, 6 May 2024 05:11:28 +0200 Subject: device/dram/ddr{3,4}: Rename spd_raw_data for specific DDR Rename different spd_raw_data[] for DDR3 and DDR4. This is to solve the conflict when we include both "ddr3.h" and ddr4.h" for example here: src/device/dram/spd.c. Otherwise, it won't compile as DDR3 and DDR4 have different spd_raw_data[] size. Change-Id: I46597fe82790410fbb53d60e04b7fdffb7b0094a Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/82171 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/baytrail/romstage/raminit.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/baytrail') diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c index b64364bed8..6244072c55 100644 --- a/src/soc/intel/baytrail/romstage/raminit.c +++ b/src/soc/intel/baytrail/romstage/raminit.c @@ -59,7 +59,7 @@ static void populate_smbios_tables(void *dram_data, int speed, int num_channels) enum spd_status status; /* Decode into dimm_attr struct */ - status = spd_decode_ddr3(&dimm, *(spd_raw_data *)dram_data); + status = spd_decode_ddr3(&dimm, *(spd_ddr3_raw_data *)dram_data); /* Some SPDs have bad CRCs, nothing we can do about it */ if (status == SPD_STATUS_OK || status == SPD_STATUS_CRC_ERROR) { -- cgit v1.2.3