From 580e7223bb617cfa14bf24e48bb39bac47c4e8e0 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Thu, 19 Mar 2015 21:04:23 +0200 Subject: devicetree: Change scan_bus() prototype in device ops MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The input/output value max is no longer used for tracking the bus enumeration sequence, everything is handled in the context of devicetree bus objects. Change-Id: I545088bd8eaf205b1436d8c52d3bc7faf4cfb0f9 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/8541 Tested-by: build bot (Jenkins) Tested-by: Raptor Engineering Automated Test Stand Reviewed-by: Timothy Pearson Reviewed-by: Patrick Georgi --- src/soc/intel/baytrail/pcie.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/baytrail') diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c index e4c0654b41..4a050fa55a 100644 --- a/src/soc/intel/baytrail/pcie.c +++ b/src/soc/intel/baytrail/pcie.c @@ -230,7 +230,7 @@ static void byt_pcie_enable(device_t dev) southcluster_enable_dev(dev); } -static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max) +static void byt_pciexp_scan_bridge(device_t dev) { static const struct reg_script wait_for_link_active[] = { REG_PCI_POLL32(LCTL, (1 << 29) , (1 << 29), 50000), @@ -240,7 +240,7 @@ static unsigned int byt_pciexp_scan_bridge(device_t dev, unsigned int max) /* wait for Link Active with 50ms timeout */ reg_script_run_on_dev(dev, wait_for_link_active); - return do_pci_scan_bridge(dev, max, pciexp_scan_bus); + do_pci_scan_bridge(dev, pciexp_scan_bus); } static void pcie_root_set_subsystem(device_t dev, unsigned vid, unsigned did) -- cgit v1.2.3