From 25200327d9487e8948da8c9cbb3331e8bb00f8c9 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 20 Mar 2019 18:36:37 +0200 Subject: soc/intel/{baytrail,braswell}: Make use of generic set_subsystem() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We missed some PCIe root ports with previous cleanup. Change-Id: I8bf8f8b2ca1836316f84fb7f01820a00d7194d51 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31991 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/soc/intel/baytrail/pcie.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'src/soc/intel/baytrail') diff --git a/src/soc/intel/baytrail/pcie.c b/src/soc/intel/baytrail/pcie.c index 2740f1084e..33c5455c50 100644 --- a/src/soc/intel/baytrail/pcie.c +++ b/src/soc/intel/baytrail/pcie.c @@ -240,18 +240,8 @@ static void byt_pciexp_scan_bridge(struct device *dev) do_pci_scan_bridge(dev, pciexp_scan_bus); } -static void pcie_root_set_subsystem(struct device *dev, unsigned vid, - unsigned did) -{ - uint32_t didvid = ((did & 0xffff) << 16) | (vid & 0xffff); - - if (!didvid) - didvid = pci_read_config32(dev, PCI_VENDOR_ID); - pci_write_config32(dev, 0x94, didvid); -} - static struct pci_operations pcie_root_ops = { - .set_subsystem = &pcie_root_set_subsystem, + .set_subsystem = pci_dev_set_subsystem, }; static struct device_operations device_ops = { -- cgit v1.2.3