From 052fb7c45136263ed194c24fd4d04488a2608fd3 Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Fri, 18 Aug 2023 14:25:22 -0700 Subject: x86: Add pre-memory stages CBFS cache scratchpad support Having a CBFS cache scratchpad offers a generic way to decompress CBFS files through the cbfs_map() function without having to reserve a per-file specific memory region. This commit introduces the x86 `PRERAM_CBFS_CACHE_SIZE' Kconfig to set the pre-memory stages CBFS cache size. A cache size of zero disables the CBFS cache feature. The default value is 16 KB which seems a reasonable minimal value enough to satisfy basic needs such as the decompression of a small configuration file. This setting can be adjusted depending on the platform needs and capabilities. We have set this size to zero for all the platforms without enough space in Cache-As-RAM to accommodate the default size. TEST=Decompression of vbt.bin in romstage on rex using cbfs_map() Change-Id: Iee493f9947fddcc57576f04c3d6a2d58c7368e09 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/77290 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/soc/intel/baytrail/Kconfig | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/soc/intel/baytrail') diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 13fd201f9f..dbadbf1105 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -110,6 +110,9 @@ config DCACHE_RAM_SIZE and/or romstage. Note DCACHE_RAM_SIZE and DCACHE_RAM_MRC_VAR_SIZE must add up to a power of 2. +config PRERAM_CBFS_CACHE_SIZE + default 0x0 + config DCACHE_RAM_MRC_VAR_SIZE hex default 0x8000 -- cgit v1.2.3