From 99a3bba171695804624b8426052de0cd552f1455 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sun, 7 Dec 2014 14:57:26 -0700 Subject: intel/baytrail: Spelling fixes Change-Id: Ideb58634a029d55746421ad1ea4b80811bca403c Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/7705 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/soc/intel/baytrail/tsc_freq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/baytrail/tsc_freq.c') diff --git a/src/soc/intel/baytrail/tsc_freq.c b/src/soc/intel/baytrail/tsc_freq.c index 90f154c896..da7e96590c 100644 --- a/src/soc/intel/baytrail/tsc_freq.c +++ b/src/soc/intel/baytrail/tsc_freq.c @@ -68,11 +68,11 @@ void set_max_freq(void) msr.lo |= (1 << 16); wrmsr(MSR_IA32_MISC_ENABLES, msr); - /* Set guranteed ratio [21:16] from IACORE_RATIOS to bits [15:8] of + /* Set guaranteed ratio [21:16] from IACORE_RATIOS to bits [15:8] of * the PERF_CTL. */ msr = rdmsr(MSR_IACORE_RATIOS); perf_ctl.lo = (msr.lo & 0x3f0000) >> 8; - /* Set guranteed vid [21:16] from IACORE_VIDS to bits [7:0] of + /* Set guaranteed vid [21:16] from IACORE_VIDS to bits [7:0] of * the PERF_CTL. */ msr = rdmsr(MSR_IACORE_VIDS); perf_ctl.lo |= (msr.lo & 0x7f0000) >> 16; -- cgit v1.2.3