From ecf90863898469c9fa8251eedb62ec8e064f25c9 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 24 Sep 2013 12:36:14 -0500 Subject: baytrail: initialize graphics before MRC The graphics device needs to have its resource contraints initialized before running the reference code. Right now just use a 256MiB aperture, 32MiB of stolen memory data, and 2MiB GTT memory. BUG=chrome-os-partner:22869 BRANCH=None TEST=Built and booted. Noted amount of stolen memory matches configuration as well as BAR size within the graphics device. Change-Id: I328bf858f288363187cf705d6340947393b5ff10 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/170427 Reviewed-on: http://review.coreboot.org/4850 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/soc/intel/baytrail/romstage/Makefile.inc | 1 + src/soc/intel/baytrail/romstage/gfx.c | 49 ++++++++++++++++++++++++++++ src/soc/intel/baytrail/romstage/romstage.c | 2 ++ 3 files changed, 52 insertions(+) create mode 100644 src/soc/intel/baytrail/romstage/gfx.c (limited to 'src/soc/intel/baytrail/romstage') diff --git a/src/soc/intel/baytrail/romstage/Makefile.inc b/src/soc/intel/baytrail/romstage/Makefile.inc index 188ce44ecd..118c3485cd 100644 --- a/src/soc/intel/baytrail/romstage/Makefile.inc +++ b/src/soc/intel/baytrail/romstage/Makefile.inc @@ -2,3 +2,4 @@ cpu_incs += $(src)/soc/intel/baytrail/romstage/cache_as_ram.inc romstage-y += romstage.c romstage-y += raminit.c romstage-$(CONFIG_ENABLE_BUILTIN_COM1) += uart.c +romstage-y += gfx.c diff --git a/src/soc/intel/baytrail/romstage/gfx.c b/src/soc/intel/baytrail/romstage/gfx.c new file mode 100644 index 0000000000..3b47ccf954 --- /dev/null +++ b/src/soc/intel/baytrail/romstage/gfx.c @@ -0,0 +1,49 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#include +#include +#include +#include + +void gfx_init(void) +{ + uint32_t ggc; + uint8_t msac; + const unsigned int gfx_dev = PCI_DEV(0, GFX_DEV, GFX_FUNC); + + /* The GFX device needs to set the aperture, gtt stolen size, and + * graphics stolen memory stolen size before running MRC. For now + * just hard code the defaults. Options can be added to the device + * tree if needed. */ + + ggc = pci_read_config32(gfx_dev, GGC); + msac = pci_read_config8(gfx_dev, MSAC); + + ggc &= ~(GGC_GTT_SIZE_MASK | GGC_GSM_SIZE_MASK); + ggc |= GGC_GTT_SIZE_2MB | GGC_GSM_SIZE_32MB; + /* Enable VGA decoding as well. */ + ggc &= ~(GGC_VGA_DISABLE); + + msac &= ~(APERTURE_SIZE_MASK); + msac |= APERTURE_SIZE_256MB; + + pci_write_config32(gfx_dev, GGC, ggc); + pci_write_config8(gfx_dev, MSAC, msac); +} diff --git a/src/soc/intel/baytrail/romstage/romstage.c b/src/soc/intel/baytrail/romstage/romstage.c index d3538991bb..e4e6fdecee 100644 --- a/src/soc/intel/baytrail/romstage/romstage.c +++ b/src/soc/intel/baytrail/romstage/romstage.c @@ -89,6 +89,8 @@ void romstage_common(const struct romstage_params *params) console_init(); + gfx_init(); + /* Initialize RAM */ raminit(params->mrc_params, 5); -- cgit v1.2.3