From 6aa9f1f0eb97e315ab4db8e6da1d13db7ee7858f Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Thu, 7 Nov 2013 12:47:35 -0800 Subject: baytrail: Add BCLK and IACORE to pattrs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The bus clock speed is needed when building ACPI P-state tables so extract that function and have the value be saved in pattrs. The various IACORE values are also needed, but rather than have the ACPI code to the bit manipulation have the pattrs store an array of the possible values for it to use directly. BUG=chrome-os-partner:23505 BRANCH=none TEST=build and boot on rambi Change-Id: I5ac06ccf66e9109186dd01342dbb6ccdd334ca69 Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/176140 Reviewed-by: Aaron Durbin Commit-Queue: Aaron Durbin Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/4953 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/intel/baytrail/ramstage.c | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/baytrail/ramstage.c') diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index ab29190936..0c2bed86b7 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -76,6 +76,7 @@ static const char *stepping_str[] = { "A0", "A1", "B0", "B1", "B2", "B3" }; static void fill_in_pattrs(void) { device_t dev; + msr_t msr; struct pattrs *attrs = (struct pattrs *)pattrs_get(); attrs->cpuid = cpuid_eax(1); @@ -103,8 +104,24 @@ static void fill_in_pattrs(void) fill_in_msr(&attrs->platform_id, MSR_IA32_PLATFORM_ID); fill_in_msr(&attrs->platform_info, MSR_PLATFORM_INFO); - fill_in_msr(&attrs->iacore_ratios, MSR_IACORE_RATIOS); - fill_in_msr(&attrs->iacore_vids, MSR_IACORE_VIDS); + + /* Set IA core speed ratio and voltages */ + msr = rdmsr(MSR_IACORE_RATIOS); + attrs->iacore_ratios[IACORE_MIN] = msr.lo & 0x7f; + attrs->iacore_ratios[IACORE_LFM] = (msr.lo >> 8) & 0x7f; + attrs->iacore_ratios[IACORE_MAX] = (msr.lo >> 16) & 0x7f; + msr = rdmsr(MSR_IACORE_TURBO_RATIOS); + attrs->iacore_ratios[IACORE_TURBO] = (msr.lo & 0xff); /* 1 core max */ + + msr = rdmsr(MSR_IACORE_VIDS); + attrs->iacore_vids[IACORE_MIN] = msr.lo & 0x7f; + attrs->iacore_vids[IACORE_LFM] = (msr.lo >> 8) & 0x7f; + attrs->iacore_vids[IACORE_MAX] = (msr.lo >> 16) & 0x7f; + msr = rdmsr(MSR_IACORE_TURBO_VIDS); + attrs->iacore_vids[IACORE_TURBO] = (msr.lo & 0xff); /* 1 core max */ + + /* Set bus clock speed */ + attrs->bclk_khz = bus_freq_khz(); } static inline void set_acpi_sleep_type(int val) -- cgit v1.2.3