From e7fa24470dc3b3403eabd757a87cfb993f316b1a Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sat, 1 Jun 2024 18:12:16 +0200 Subject: cbmem_top: Change the return value to uintptr_t MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ib757c0548f6f643747ba8d70228b3d6dfa5182cd Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/82752 Reviewed-by: Jérémy Compostella Reviewed-by: Jakub Czapiga Tested-by: build bot (Jenkins) --- src/soc/intel/baytrail/memmap.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) (limited to 'src/soc/intel/baytrail/memmap.c') diff --git a/src/soc/intel/baytrail/memmap.c b/src/soc/intel/baytrail/memmap.c index 43b96c1c34..924853482a 100644 --- a/src/soc/intel/baytrail/memmap.c +++ b/src/soc/intel/baytrail/memmap.c @@ -29,13 +29,11 @@ void smm_region(uintptr_t *start, size_t *size) void fill_postcar_frame(struct postcar_frame *pcf) { - uintptr_t top_of_ram; - /* Cache at least 8 MiB below the top of ram, and at most 8 MiB * above top of the ram. This satisfies MTRR alignment requirement * with different TSEG size configurations. */ - top_of_ram = ALIGN_DOWN((uintptr_t)cbmem_top(), 8*MiB); + const uintptr_t top_of_ram = ALIGN_DOWN(cbmem_top(), 8 * MiB); postcar_frame_add_mtrr(pcf, top_of_ram - 8*MiB, 16*MiB, MTRR_TYPE_WRBACK); } -- cgit v1.2.3