From 474a7c51cecfd2e37b315da9cfb25607f3ad84f1 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 7 Feb 2017 22:07:56 -0600 Subject: google/rambi: add explicit pull-down for ram-id Some variants need the internal pull resistor on GPIO_SSUS_40 set explicitly to pull down rather than disabling the pull, in order for the ram-id to be read correctly via GPIO. Correct this by adding a function to enable and set the internal pull and define its use as needed in the board's variant.h. Chromium source: branch: firmware-gnawty-5216.239.B /src/soc/intel/baytrail/baytrail/gpio.h#418 /src/mainboard/google/gnawty/romstage.c#60 Test: boot 4GB Candy board and observe correct RAM id, amount detected Change-Id: I8823c27385f4422184b5afa57f6048f7ff2a25ab Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/18309 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Paul Menzel --- src/soc/intel/baytrail/include/soc/gpio.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/baytrail/include') diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h index 3757eb012c..9c6b7fd025 100644 --- a/src/soc/intel/baytrail/include/soc/gpio.h +++ b/src/soc/intel/baytrail/include/soc/gpio.h @@ -454,4 +454,11 @@ static inline void ssus_disable_internal_pull(int pad) write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask); } +static inline void ssus_enable_internal_pull(int pad, int mask) +{ + const int pull_mask = ~(0xf << 7); + write32(ssus_pconf0(pad), + (read32(ssus_pconf0(pad)) & pull_mask) | mask); +} + #endif /* _BAYTRAIL_GPIO_H_ */ -- cgit v1.2.3