From 18ea2d3fbdf89f60a74dc8aabfdb2aa4d3475754 Mon Sep 17 00:00:00 2001
From: Julius Werner <jwerner@chromium.org>
Date: Tue, 7 Oct 2014 16:42:17 -0700
Subject: baytrail: Change all SoC headers to <soc/headername.h> system

This patch aligns baytrail to the new SoC header include scheme.

BUG=None
TEST=Tested with whole series. Compiled Rambi.

Change-Id: I0f0a894f6f33449756582eefa0b50bae545220db
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 1216a86538517c03a7e5bca547d08ff3dbcaa083
Original-Change-Id: If5d2a609354b3d773aa3d482e682ab97422fd9d5
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/222026
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/9363
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Aaron Durbin <adurbin@google.com>
---
 src/soc/intel/baytrail/chip.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'src/soc/intel/baytrail/chip.c')

diff --git a/src/soc/intel/baytrail/chip.c b/src/soc/intel/baytrail/chip.c
index 7a5b9c22f5..281019ab95 100644
--- a/src/soc/intel/baytrail/chip.c
+++ b/src/soc/intel/baytrail/chip.c
@@ -22,8 +22,8 @@
 #include <device/pci.h>
 #include <arch/pci_ops.h>
 
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
 #include "chip.h"
 
 static void pci_domain_set_resources(device_t dev)
-- 
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