From 8923be58b87cbf55f5765eca6ce29d7b6827be97 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 5 Nov 2013 13:02:30 -0800 Subject: baytrail: Add ACPI CPU entries MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit - C-state table based on static config MWAIT values are from ref code for non-S0ix config C6 substate 8 is ignored by the kernel as it violates the CPUID but it is left in as the other substate may not work. - P-state table generated with proper ratio and VID values relies on having the package power msr set to magic value as the power-on default is wrong - T-state table uses static table BUG=chrome-os-partner:23505 BRANCH=rambi TEST=build and boot on rambi Change-Id: I7c997e58cb3a71d0ec413b17f0c5467bef4bf62c Signed-off-by: Duncan Laurie Reviewed-on: https://chromium-review.googlesource.com/175742 Reviewed-by: Aaron Durbin Commit-Queue: Aaron Durbin Signed-off-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/4954 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/soc/intel/baytrail/acpi/globalnvs.asl | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/baytrail/acpi') diff --git a/src/soc/intel/baytrail/acpi/globalnvs.asl b/src/soc/intel/baytrail/acpi/globalnvs.asl index 37a234c485..2f614a9806 100644 --- a/src/soc/intel/baytrail/acpi/globalnvs.asl +++ b/src/soc/intel/baytrail/acpi/globalnvs.asl @@ -50,6 +50,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PWRS, 8, // 0x10 - Power State (AC = 1) PCNT, 8, // 0x11 - Processor count TPMP, 8, // 0x12 - TPM Present and Enabled + TLVL, 8, // 0x13 - Throttle Level /* Device Config */ Offset (0x20), -- cgit v1.2.3