From 6d085446feb3d47154ff9641b66f583ddc218d40 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 14 Feb 2021 01:55:18 +0200 Subject: soc/intel/baytrail,braswell: Drop aliases on MMCONF_BASE_ADDRESS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add MMCONF_BUS_NUMBER=256 to match previous allocation. Change-Id: I01a86481e392a9347afdc2860b58617b20c4f05a Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/50663 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/baytrail/acpi/southcluster.asl | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/baytrail/acpi') diff --git a/src/soc/intel/baytrail/acpi/southcluster.asl b/src/soc/intel/baytrail/acpi/southcluster.asl index ab273448ca..5f20463c2a 100644 --- a/src/soc/intel/baytrail/acpi/southcluster.asl +++ b/src/soc/intel/baytrail/acpi/southcluster.asl @@ -198,7 +198,7 @@ Device (PDRC) Name (PDRS, ResourceTemplate() { Memory32Fixed(ReadWrite, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE) - Memory32Fixed(ReadWrite, MCFG_BASE_ADDRESS, MCFG_BASE_SIZE) + Memory32Fixed(ReadWrite, CONFIG_MMCONF_BASE_ADDRESS, CONFIG_MMCONF_LENGTH) Memory32Fixed(ReadWrite, PMC_BASE_ADDRESS, PMC_BASE_SIZE) Memory32Fixed(ReadWrite, ILB_BASE_ADDRESS, ILB_BASE_SIZE) Memory32Fixed(ReadWrite, SPI_BASE_ADDRESS, SPI_BASE_SIZE) @@ -247,7 +247,7 @@ Device (IOSF) Method (_CRS) { CreateDwordField (^RBUF, ^RBAR._BAS, RBAS) - Store (Add (MCFG_BASE_ADDRESS, 0xD0), RBAS) + Store (Add (CONFIG_MMCONF_BASE_ADDRESS, 0xD0), RBAS) Return (^RBUF) } } -- cgit v1.2.3