From 44ef38f70344f44ee53a3883515246172eb75054 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 25 May 2020 08:52:07 +0300 Subject: arch/x86: Remove NO_FIXED_XIP_ROM_SIZE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The variable SETUP_XIP_CACHE provides us a working alternative. Change-Id: I6e3befedbbc7967b71409640dc81a0c2a9b3e511 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/41821 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/baytrail/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'src/soc/intel/baytrail/Kconfig') diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1fd9c4072c..326dff2467 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -20,7 +20,6 @@ config CPU_SPECIFIC_OPTIONS select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI_SILVERMONT - select NO_FIXED_XIP_ROM_SIZE select PARALLEL_MP select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK -- cgit v1.2.3