From 91600a318210e703704790afe28c073f5ecfab86 Mon Sep 17 00:00:00 2001 From: John Zhao Date: Thu, 10 Jan 2019 12:13:38 -0800 Subject: soc/intel/apollolake: Add option to disable xHCI Link Compliance Mode Provide options to disable xHCI Link Compliance Mode. Default is FALSE to not disable Compliance Mode. Set TRUE to disable Compliance Mode. BRANCH=octopus BUG=b:115699781 TEST=Verified booting to kernel. Change-Id: I2a486bc4c1a8578cfd7ac3d17103e889eaa25fe4 Signed-off-by: John Zhao Reviewed-on: https://review.coreboot.org/c/30816 Reviewed-by: Justin TerAvest Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/chip.c | 7 ++++++- src/soc/intel/apollolake/chip.h | 6 ++++++ 2 files changed, 12 insertions(+), 1 deletion(-) (limited to 'src/soc/intel/apollolake') diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 1c8f321924..b38265fdd4 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -571,8 +571,13 @@ static void glk_fsp_silicon_init_params_cb( * FSP provides UPD interface to execute IPC command. In order to * improve boot performance, configure PmicPmcIpcCtrl for PMC to program * PMIC PCH_PWROK delay. - */ + */ silconfig->PmicPmcIpcCtrl = cfg->PmicPmcIpcCtrl; + + /* + * Options to disable XHCI Link Compliance Mode. + */ + silconfig->DisableComplianceMode = cfg->DisableComplianceMode; #endif } diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index 202f2acf1e..b9c9dc58ac 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -162,6 +162,12 @@ struct soc_intel_apollolake_config { * (31:24) + Register_Offset (23:16) + OR Value (15:8) + AND Value (7:0) */ uint32_t PmicPmcIpcCtrl; + + /* Options to disable XHCI Link Compliance Mode. Default is FALSE to not + * disable Compliance Mode. Set TRUE to disable Compliance Mode. + * 0:FALSE(Default), 1:True. + */ + uint8_t DisableComplianceMode; }; typedef struct soc_intel_apollolake_config config_t; -- cgit v1.2.3