From 71624cd94f85b8cdad7ae59e9af6a9a509ba51c3 Mon Sep 17 00:00:00 2001 From: Michael Niewöhner Date: Sun, 17 Jan 2021 01:42:15 +0100 Subject: soc/intel/*: drop broken LPC mmio code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The code for setting the LPC generic memory range uses an array of fixed address ranges not needing explicit decoding, to decide if the address needs to be written to the LGMR register. Most platforms only mistakenly add the PCH reserved mmio range, that is not decoded generally, effectively breaking the mechanism. Only APL uses the array correctly. That code, in it's current state, does not work (except for APL) and currently, there is not a single user. Thus, drop it before people start using it. Change-Id: I723415fedd1b1d95c502badf7b0510a1338b11ac Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/49588 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/apollolake/lpc.c | 19 ------------------- 1 file changed, 19 deletions(-) (limited to 'src/soc/intel/apollolake') diff --git a/src/soc/intel/apollolake/lpc.c b/src/soc/intel/apollolake/lpc.c index ad9211b9c2..e37ab2070f 100644 --- a/src/soc/intel/apollolake/lpc.c +++ b/src/soc/intel/apollolake/lpc.c @@ -8,25 +8,6 @@ #include #include "chip.h" -static const struct lpc_mmio_range apl_lpc_fixed_mmio_ranges[] = { - { 0xfed40000, 0x8000 }, - { 0xfedc0000, 0x4000 }, - { 0xfed20800, 16 }, - { 0xfed20880, 8 }, - { 0xfed208e0, 16 }, - { 0xfed208f0, 8 }, - { 0xfed30800, 16 }, - { 0xfed30880, 8 }, - { 0xfed308e0, 16 }, - { 0xfed308f0, 8 }, - { 0, 0 } -}; - -const struct lpc_mmio_range *soc_get_fixed_mmio_ranges(void) -{ - return apl_lpc_fixed_mmio_ranges; -} - static const struct pad_config lpc_gpios[] = { #if CONFIG(SOC_INTEL_GEMINILAKE) #if !CONFIG(SOC_ESPI) -- cgit v1.2.3