From 4fa183fe79f5f7fc66750ee0bd2376f5c99ed9b0 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 6 Jan 2021 20:30:35 -0800 Subject: soc/intel/uart: Drop SoC callback `soc_uart_console_to_device` This change renames `struct uart_gpio_pad_config` to `struct uart_controller_config` and adds a new parameter devfn (which expects devfn for the UART controller corresponding to the index in PCI_DEVFN() format). This gets rid of the SoC callback to get `struct device` pointer to the UART controller device. Change-Id: Id0712a0038f2cc1a61b8b5a58fa155f14e7949a5 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/c/coreboot/+/49212 Reviewed-by: Angel Pons Reviewed-by: Karthik Ramasubramanian Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/uart.c | 31 +++++++------------------------ 1 file changed, 7 insertions(+), 24 deletions(-) (limited to 'src/soc/intel/apollolake/uart.c') diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c index 4e35ee5a0a..28ad71a19d 100644 --- a/src/soc/intel/apollolake/uart.c +++ b/src/soc/intel/apollolake/uart.c @@ -11,11 +11,11 @@ #include #include -/* UART pad configuration. Support RXD and TXD for now. */ -const struct uart_gpio_pad_config uart_gpio_pads[] = { +const struct uart_controller_config uart_ctrlr_config[] = { #if CONFIG(SOC_INTEL_GEMINILAKE) { .console_index = 0, + .devfn = PCH_DEVFN_UART0, .gpios = { PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_60, NATIVE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */ @@ -26,6 +26,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { }, { .console_index = 2, + .devfn = PCH_DEVFN_UART2, .gpios = { PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, NATIVE, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART2_RXD */ @@ -36,6 +37,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { #else { .console_index = 0, + .devfn = PCH_DEVFN_UART0, .gpios = { PAD_CFG_NF(GPIO_38, NATIVE, DEEP, NF1), /* UART0 RX */ PAD_CFG_NF(GPIO_39, NATIVE, DEEP, NF1), /* UART0 TX */ @@ -43,6 +45,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { }, { .console_index = 1, + .devfn = PCH_DEVFN_UART1, .gpios = { PAD_CFG_NF(GPIO_42, NATIVE, DEEP, NF1), /* UART1 RX */ PAD_CFG_NF(GPIO_43, NATIVE, DEEP, NF1), /* UART1 TX */ @@ -50,6 +53,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { }, { .console_index = 2, + .devfn = PCH_DEVFN_UART2, .gpios = { PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* UART2 RX */ PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* UART2 TX */ @@ -58,25 +62,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = { #endif }; -const int uart_max_index = ARRAY_SIZE(uart_gpio_pads); - -DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console) -{ - /* - * if index is valid, this function will return corresponding structure - * for uart console else will return NULL. - */ - switch (uart_console) { - case 0: - return pcidev_path_on_root(PCH_DEVFN_UART0); - case 1: - return pcidev_path_on_root(PCH_DEVFN_UART1); - case 2: - return pcidev_path_on_root(PCH_DEVFN_UART2); - case 3: - return pcidev_path_on_root(PCH_DEVFN_UART3); - default: - printk(BIOS_ERR, "Invalid UART console index\n"); - return NULL; - } -} +const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config); -- cgit v1.2.3