From 14222d86785d89415c014dab294205fd186b7084 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 5 Aug 2019 15:10:18 +0300 Subject: arch/x86: Change smm_subregion() prototype MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Do this to avoid some amount of explicit typecasting that would be required otherwise. Change-Id: I5bc2c3c1dd579f7c6c3d3354c0691e4ba3c778e1 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/34706 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/soc/intel/apollolake/romstage.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'src/soc/intel/apollolake/romstage.c') diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 62eb1db1fe..3ce63704fb 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -202,10 +202,9 @@ asmlinkage void car_stage_entry(void) uintptr_t top_of_ram; bool s3wake; struct chipset_power_state *ps = pmc_get_power_state(); - void *smm_base; + uintptr_t smm_base; size_t smm_size, var_size; const void *new_var_data; - uintptr_t tseg_base; timestamp_add_now(TS_START_ROMSTAGE); @@ -258,8 +257,7 @@ asmlinkage void car_stage_entry(void) * region for other purposes. */ smm_region(&smm_base, &smm_size); - tseg_base = (uintptr_t)smm_base; - postcar_frame_add_mtrr(&pcf, tseg_base, smm_size, MTRR_TYPE_WRBACK); + postcar_frame_add_mtrr(&pcf, smm_base, smm_size, MTRR_TYPE_WRBACK); run_postcar_phase(&pcf); } -- cgit v1.2.3