From 4ed9f9a507a8b3419bc45431b8f1afb02c728a9e Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Sat, 31 Oct 2020 22:01:55 +0530
Subject: soc/intel: Use of common reset code block

This patch removes all redundant reset code block from each SoC
and make use of common reset code block(fsp_reset.c) based on
SOC_INTEL_COMMON_FSP_RESET.

Respective SoC Kconfig to choose correct FSP global reset type as
per FSP integration guide.

Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Change-Id: I71531f4cf7a40efa9ec55c48c2cb4fb6ea90531f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/soc/intel/apollolake/reset.c | 14 --------------
 1 file changed, 14 deletions(-)

(limited to 'src/soc/intel/apollolake/reset.c')

diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c
index 8641b63aaf..186a546388 100644
--- a/src/soc/intel/apollolake/reset.c
+++ b/src/soc/intel/apollolake/reset.c
@@ -3,7 +3,6 @@
 #include <cf9_reset.h>
 #include <console/console.h>
 #include <delay.h>
-#include <fsp/util.h>
 #include <intelblocks/pmclib.h>
 #include <soc/heci.h>
 #include <soc/intel/common/reset.h>
@@ -47,16 +46,3 @@ void cf9_reset_prepare(void)
 	}
 	printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw));
 }
-
-void chipset_handle_reset(uint32_t status)
-{
-	switch (status) {
-	case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */
-		global_reset();
-		break;
-	default:
-		printk(BIOS_ERR, "unhandled reset type %x\n", status);
-		die("unknown reset type");
-		break;
-	}
-}
-- 
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