From 3a94a3ba5b238067f382d07f92c57373003b79cc Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Mon, 18 Jul 2016 00:15:41 -0700 Subject: drivers/intel/fsp2_0: Split reset handling logic FSP 2.0 spec only defines 2 reset request (COLD, WARM) exit codes. The rest 6 codes are platform-specific and may vary. Modify helper function so that only basic resets are handled and let SoC deal with the rest. Change-Id: Ib2f446e0449301407b135933a2088bcffc3ac32a Signed-off-by: Andrey Petrov Reviewed-on: https://review.coreboot.org/15730 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/reset.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'src/soc/intel/apollolake/reset.c') diff --git a/src/soc/intel/apollolake/reset.c b/src/soc/intel/apollolake/reset.c index f759bac06b..4bfdee4b75 100644 --- a/src/soc/intel/apollolake/reset.c +++ b/src/soc/intel/apollolake/reset.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -57,3 +58,16 @@ void reset_prepare(void) } printk(BIOS_SPEW, "CSE took %lu ms\n", stopwatch_duration_msecs(&sw)); } + +void chipset_handle_reset(enum fsp_status status) +{ + switch(status) { + case FSP_STATUS_RESET_REQUIRED_5: /* Global Reset */ + global_reset(); + break; + default: + printk(BIOS_ERR, "unhandled reset type %x\n", status); + die("unknown reset type"); + break; + } +} -- cgit v1.2.3