From b7b5666110bdbcccded5d929f6d44e9140c413e0 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 28 Nov 2017 17:54:15 +0530 Subject: soc/intel/apollolake: Make use of Intel common Graphics block TEST=Build and boot reef. Change-Id: I0edd7454912201598c43e35990e470ec18a32638 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/22616 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/graphics.c | 52 ++++++------------------------------- 1 file changed, 8 insertions(+), 44 deletions(-) (limited to 'src/soc/intel/apollolake/graphics.c') diff --git a/src/soc/intel/apollolake/graphics.c b/src/soc/intel/apollolake/graphics.c index 90859d5c48..4fa525e6f1 100644 --- a/src/soc/intel/apollolake/graphics.c +++ b/src/soc/intel/apollolake/graphics.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015-2016 Intel Corp. + * Copyright (C) 2015-2017 Intel Corp. * (Written by Alexandru Gagniuc for Intel Corp.) * * This program is free software; you can redistribute it and/or modify @@ -15,34 +15,21 @@ * GNU General Public License for more details. */ -#include #include #include #include #include #include -#include -#include +#include #include uintptr_t fsp_soc_get_igd_bar(void) { - device_t dev = SA_DEV_IGD; - - /* Check if IGD PCI device is disabled */ - if (!dev->enabled) - return 0; - - return find_resource(dev, PCI_BASE_ADDRESS_2)->base; -} - -static void igd_set_resources(struct device *dev) -{ - pci_dev_set_resources(dev); + return graphics_get_memory_base(); } -static unsigned long igd_write_opregion(device_t dev, unsigned long current, - struct acpi_rsdp *rsdp) +uintptr_t graphics_soc_write_acpi_opregion(struct device *device, + uintptr_t current, struct acpi_rsdp *rsdp) { igd_opregion_t *opregion; uint16_t reg16; @@ -77,34 +64,11 @@ static unsigned long igd_write_opregion(device_t dev, unsigned long current, * Maybe it should move to the finalize handler. */ - pci_write_config32(dev, ASLS, (uintptr_t)opregion); - reg16 = pci_read_config16(dev, SWSCI); + pci_write_config32(device, ASLS, (uintptr_t)opregion); + reg16 = pci_read_config16(device, SWSCI); reg16 &= ~(1 << 0); reg16 |= (1 << 15); - pci_write_config16(dev, SWSCI, reg16); + pci_write_config16(device, SWSCI, reg16); return acpi_align_current(current); } - -static const struct device_operations igd_ops = { - .read_resources = pci_dev_read_resources, - .set_resources = igd_set_resources, - .enable_resources = pci_dev_enable_resources, - .init = pci_dev_init, - .write_acpi_tables = igd_write_opregion, - .enable = DEVICE_NOOP -}; - -static const unsigned short pci_device_ids[] = { - PCI_DEVICE_ID_INTEL_APL_IGD_HD_505, - PCI_DEVICE_ID_INTEL_APL_IGD_HD_500, - PCI_DEVICE_ID_INTEL_GLK_IGD, - PCI_DEVICE_ID_INTEL_GLK_IGD_EU12, - 0, -}; - -static const struct pci_driver integrated_graphics_driver __pci_driver = { - .ops = &igd_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .devices = pci_device_ids, -}; -- cgit v1.2.3