From 986d5c90a51f21ff8f229288ad80dab968a022b9 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 28 May 2018 17:38:12 +0530 Subject: soc/intel/{apollolake, geminilake}: Add option to skip coreboot MP init This patch provides option for mainboard to skip coreboot MP initialization if required based on use_fsp_mp_init. Option for mainboard to skip coreboot MP initialization * 0 = Make use of coreboot MP Init * 1 = Make use of FSP MP Init Default coreboot does MP initialization for APL and GLK. Change-Id: I9253af6f28bf694782c117296766fd8564dc2b14 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/26643 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/chip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/apollolake/chip.c') diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 24c7a599e5..31b6b1747f 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -614,7 +614,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd) if (!IS_ENABLED(CONFIG_SOC_INTEL_GLK)) silconfig->MonitorMwaitEnable = 0; - silconfig->SkipMpInit = 1; + silconfig->SkipMpInit = !cfg->use_fsp_mp_init; /* Disable setting of EISS bit in FSP. */ silconfig->SpiEiss = 0; -- cgit v1.2.3