From f87275f8216aa230c6f05069eeeb07a17a99ef43 Mon Sep 17 00:00:00 2001
From: Andrey Petrov <andrey.petrov@intel.com>
Date: Tue, 29 Mar 2016 14:19:53 -0700
Subject: soc/intel/apollolake: Enable ACPI PM1 timer emulation

Enable emulation for ACPI PM1 timer. This is needed by FSP-M
MemoryInit.

Change-Id: I7a441f5f1673e6430697615ae7251da948e77548
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14821
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
---
 src/soc/intel/apollolake/bootblock/bootblock.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

(limited to 'src/soc/intel/apollolake/bootblock')

diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 833f531936..cd23f5984b 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -20,6 +20,7 @@
 #include <device/pci.h>
 #include <lib.h>
 #include <soc/bootblock.h>
+#include <soc/iomap.h>
 #include <soc/cpu.h>
 #include <soc/gpio.h>
 #include <soc/northbridge.h>
@@ -36,6 +37,17 @@ static void tpm_enable(void)
 	gpio_configure_pads(tpm_spi_configs, ARRAY_SIZE(tpm_spi_configs));
 }
 
+static void enable_pm_timer(void)
+{
+	/* ACPI PM timer emulation */
+	msr_t msr;
+	/* Multiplier value that somehow 3.579545MHz freq */
+	msr.hi = 0x2FBA2E25;
+	/* Set PM1 timer IO port and enable*/
+	msr.lo = EMULATE_PM_TMR_EN | (ACPI_PMIO_BASE + R_ACPI_PM1_TMR);
+	wrmsr(MSR_EMULATE_PM_TMR, msr);
+}
+
 void asmlinkage bootblock_c_entry(void)
 {
 	device_t dev = NB_DEV_ROOT;
@@ -80,5 +92,7 @@ void bootblock_soc_early_init(void)
 	if (IS_ENABLED(CONFIG_TPM_ON_FAST_SPI))
 		tpm_enable();
 
+	enable_pm_timer();
+
 	cache_bios_region();
 }
-- 
cgit v1.2.3