From 8e1c12f12e3fb01d2228cca29de188507b3f2cc7 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Fri, 10 Mar 2017 13:51:11 +0530 Subject: soc/intel/apollolake: Add CQOS config for CAR common code Change-Id: I5947170a96e888cea2f3faac92355e72b63c1fef Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/18735 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/bootblock/cache_as_ram.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/soc/intel/apollolake/bootblock') diff --git a/src/soc/intel/apollolake/bootblock/cache_as_ram.S b/src/soc/intel/apollolake/bootblock/cache_as_ram.S index 495b61bfac..c452b9a84f 100644 --- a/src/soc/intel/apollolake/bootblock/cache_as_ram.S +++ b/src/soc/intel/apollolake/bootblock/cache_as_ram.S @@ -142,7 +142,7 @@ clear_var_mtrr: #endif #if IS_ENABLED(CONFIG_CAR_CQOS) -#if (CONFIG_DCACHE_RAM_SIZE == L2_CACHE_SIZE) +#if (CONFIG_DCACHE_RAM_SIZE == CONFIG_L2_CACHE_SIZE) /* * If CAR size is set to full L2 size, mask is calculated as all-zeros. * This is not supported by the CPU/uCode. @@ -152,7 +152,7 @@ clear_var_mtrr: /* Calculate how many bits to be used for CAR */ xor %edx, %edx mov $CONFIG_DCACHE_RAM_SIZE, %eax /* dividend */ - mov $CACHE_QOS_SIZE_PER_BIT, %ecx /* divisor */ + mov $CONFIG_CACHE_QOS_SIZE_PER_BIT, %ecx /* divisor */ div %ecx /* result is in eax */ mov %eax, %ecx /* save to ecx */ mov $1, %ebx -- cgit v1.2.3