From 0d0408ad4f94430b04007c1d3eeb93312031cf2d Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Mon, 20 Nov 2017 16:18:45 -0800 Subject: src/soc/intel/apollolake: move TCO1 disable into bootblock Cr50 reset processing could take long time, up to 30 s in the worst case. The TCO watchdog needs to be disabled before Cr50 driver starts, let's disable it in bootblock. BRANCH=none BUG=b:65867313, b:68729265 TEST=verified that resetting the device while keys are being generated by the TPM does not cause falling into recovery. Change-Id: Iaf1f97924590163e45bcac667b6c607503cc8b87 Signed-off-by: Vadim Bendebury Reviewed-on: https://review.coreboot.org/22553 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/bootblock/bootblock.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/apollolake/bootblock') diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c index f02d8cf01b..63b023d26d 100644 --- a/src/soc/intel/apollolake/bootblock/bootblock.c +++ b/src/soc/intel/apollolake/bootblock/bootblock.c @@ -89,6 +89,8 @@ static void enable_pmcbar(void) void bootblock_soc_early_init(void) { + uint32_t reg; + enable_pmcbar(); /* Clear global reset promotion bit */ @@ -109,4 +111,9 @@ void bootblock_soc_early_init(void) /* Initialize GPE for use as interrupt status */ pmc_gpe_init(); + + /* Stop TCO timer */ + reg = inl(ACPI_BASE_ADDRESS + TCO1_CNT); + reg |= TCO_TMR_HLT; + outl(reg, ACPI_BASE_ADDRESS + TCO1_CNT); } -- cgit v1.2.3