From e18e6427d0f3261f9ec361d4418b8fe1dd7cc469 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 3 Jun 2017 20:03:18 -0600 Subject: src: change coreboot to lowercase MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The word 'coreboot' should always be written in lowercase, even at the start of a sentence. Change-Id: I7945ddb988262e7483da4e623cedf972380e65a2 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20029 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Patrick Georgi --- src/soc/intel/apollolake/acpi/globalnvs.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/soc/intel/apollolake/acpi') diff --git a/src/soc/intel/apollolake/acpi/globalnvs.asl b/src/soc/intel/apollolake/acpi/globalnvs.asl index bdba305081..1548c305eb 100644 --- a/src/soc/intel/apollolake/acpi/globalnvs.asl +++ b/src/soc/intel/apollolake/acpi/globalnvs.asl @@ -33,7 +33,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) LIDS, 8, // 0x02 - LID State PWRS, 8, // 0x03 - AC Power State DPTE, 8, // 0x04 - Enable DPTF - CBMC, 32, // 0x05 - 0x08 - Coreboot Memory Console + CBMC, 32, // 0x05 - 0x08 - coreboot Memory Console PM1I, 64, // 0x09 - 0x10 - System Wake Source - PM1 Index GPEI, 64, // 0x11 - 0x18 - GPE Wake Source NHLA, 64, // 0x19 - 0x20 - NHLT Address -- cgit v1.2.3