From fc2e7413b33549814022e2734a68832e9d9be918 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 12 May 2016 12:43:37 -0500 Subject: soc/intel/apollolake: provide common LPDDR4 memory init Instead of having the mainboards duplicate logic surrounding LPDDR4 initialization provide helpers to do the heavy lifting. It also handles the quirks of the FSP configuration which allows the mainboard porting to focus on the schematic/design. Change-Id: I686eb3097c33399a3b94af89237f7fe1b2d34c2f Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/14790 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/apollolake/Makefile.inc') diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 5cc4f26099..240d3c2a69 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -26,6 +26,7 @@ romstage-y += gpio.c romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c romstage-y += lpc_lib.c romstage-y += memmap.c +romstage-y += meminit.c romstage-y += mmap_boot.c romstage-y += tsc_freq.c romstage-y += pmutil.c -- cgit v1.2.3