From bae03a519580189c46ec559d0b2ecf0bc482d0c6 Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Wed, 14 Nov 2018 17:46:14 +0100 Subject: soc/intel/apl: Hook microcode updates up Only tested on APL. Change-Id: I53f680fc4342a9bd1cd0ba9d72e025995e25f7f2 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/c/29902 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Lijian Zhao --- src/soc/intel/apollolake/Makefile.inc | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/soc/intel/apollolake/Makefile.inc') diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 822158c3c1..1fd16038a7 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -175,4 +175,12 @@ cbfs-files-$(CONFIG_NHLT_RT5682) += $(RT5682_RENDER_CAPTURE) $(RT5682_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5682_RENDER_CAPTURE) $(RT5682_RENDER_CAPTURE)-type := raw +ifeq ($(CONFIG_SOC_INTEL_GLK),y) +# Gemini Lake B0 (706a1) only atm. +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_706ax/microcode.bin +else +# Apollo Lake 506c2, B0 (506c9) and E0 (506ca) only atm. +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_506cx/microcode.bin endif + +endif # if CONFIG_SOC_INTEL_APOLLOLAKE -- cgit v1.2.3