From 9c0e180655c178793f27e8ef4d69b3fd012e1d90 Mon Sep 17 00:00:00 2001 From: Andrey Petrov Date: Thu, 23 Jun 2016 08:26:00 -0700 Subject: Revert "intel/apollolake: Use custom reset calls" Looks like we need to do real cold reset in some FSP flows, so reverting this. This reverts commit 6f762171de4b8514fddd430052cbf24524e09e5d. Change-Id: Ie948d264c4e2572dab26fdb9462905247a168177 Signed-off-by: Andrey Petrov Reviewed-on: https://review.coreboot.org/15331 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/Makefile.inc | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/soc/intel/apollolake/Makefile.inc') diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 7d49b066fe..4ad6f0f738 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -29,7 +29,6 @@ romstage-y += meminit.c romstage-y += mmap_boot.c romstage-y += tsc_freq.c romstage-y += pmutil.c -romstage-y += reset.c romstage-y += spi.c smm-y += mmap_boot.c @@ -57,7 +56,6 @@ ramstage-y += pmutil.c ramstage-y += pmc.c ramstage-y += smi.c ramstage-y += spi.c -ramstage-y += reset.c postcar-y += exit_car.S postcar-y += memmap.c @@ -72,7 +70,6 @@ verstage-y += mmap_boot.c verstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c verstage-y += tsc_freq.c verstage-y += pmutil.c -verstage-y += reset.c verstage-y += spi.c CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include -- cgit v1.2.3