From 7e86cd4bb2fd403951b068b0c70fb4f77ef6d072 Mon Sep 17 00:00:00 2001 From: Alexandru Gagniuc Date: Tue, 6 Oct 2015 10:33:49 -0700 Subject: soc/intel: Add skeleton infrastructure for Apollolake SOC This is the very very minimum needed to compile the code. Change-Id: I7f9e5f564181071591a4640019f59f91a4c456c6 Signed-off-by: Alexandru Gagniuc Reviewed-on: https://review.coreboot.org/13297 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/soc/intel/apollolake/Makefile.inc | 14 ++++++++++++++ 1 file changed, 14 insertions(+) create mode 100644 src/soc/intel/apollolake/Makefile.inc (limited to 'src/soc/intel/apollolake/Makefile.inc') diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc new file mode 100644 index 0000000000..b37cf8d8b3 --- /dev/null +++ b/src/soc/intel/apollolake/Makefile.inc @@ -0,0 +1,14 @@ +ifeq ($(CONFIG_SOC_INTEL_APOLLOLAKE),y) + +subdirs-y += ../../../cpu/intel/microcode +subdirs-y += ../../../cpu/intel/turbo +subdirs-y += ../../../cpu/x86/lapic +subdirs-y += ../../../cpu/x86/mtrr +subdirs-y += ../../../cpu/x86/smm +subdirs-y += ../../../cpu/x86/tsc + +romstage-y += placeholders.c +smm-y += placeholders.c +ramstage-y += placeholders.c + +endif -- cgit v1.2.3