From 7d14af815492d7d886244086ad24dde3d9805381 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Tue, 7 Feb 2017 11:33:56 -0600 Subject: soc/intel/apollolake: dump CSE status Dump the CSE status registers for potential debugging purposes. Explicitly call out manufacturing mode of the part since it's important shipping devices ensure manufacturing mode is locked down. Intel is planning on writing a common driver so a complete status -> string dumps was not done because (surprise surprise) not all the fields are equal with previous implementations. BUG=chrome-os-partner:62177 BRANCH=reef TEST=Booted and noted dump of CSE status registers. Change-Id: I71d15722bb193877f1569c1d3e7f441302f5bd14 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/18303 Reviewed-by: Duncan Laurie Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/apollolake/Makefile.inc') diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 5a65f43485..df93f0bd4d 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -57,6 +57,7 @@ smm-y += uart_early.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += cpu.c ramstage-y += chip.c +ramstage-y += cse.c ramstage-y += elog.c ramstage-y += flash_ctrlr.c ramstage-y += dsp.c -- cgit v1.2.3