From bef75e7dd9450679d1605df8326a4dfbf2800ff9 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 26 May 2016 11:00:44 -0500 Subject: soc/intel/apollolake: add support for verstage There previously was no support for building verstage on apollolake. Add that suport by linking in the appropriate modules as well as providing vboot_platform_is_resuming(). The link address for verstage is the same as FSP-M because they would never be in CAR along side each other. Additionally, program the ACPI I/O BAR and enable decoding so sleep state can be determined for early firmware verification. Change-Id: I1a0baab342ac55fd82dbed476abe0063787e3491 Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/14972 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh --- src/soc/intel/apollolake/Kconfig | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'src/soc/intel/apollolake/Kconfig') diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index 4643887d05..d6c5ffcea9 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -123,6 +123,12 @@ config ROMSTAGE_ADDR help The base address (in CAR) where romstage should be linked +config VERSTAGE_ADDR + hex + default 0xfef60000 + help + The base address (in CAR) where verstage should be linked + config CACHE_MRC_SETTINGS bool default y -- cgit v1.2.3