From a3d13fbd699e82781b436c88941c6d8d83133400 Mon Sep 17 00:00:00 2001 From: Ravi Sarawadi Date: Tue, 25 Apr 2017 19:30:58 -0700 Subject: soc/intel/apollolake: Update default LPDDR4 CA ODT config Update default ODT config to have correct CA ODT settings as the current defaults are incorrect for all the current apollolake designs. All the current designs pull both A and B channels' LPDDR4 modules' ODT pins to 1.1V. Therefore, the correct impedance setting needs to be applied. In order for the settings to take effect one needs to clear the memory training cache in deployed systems. Trigger this by bumping the memory setting version for the SoC. If needed in the future support for allowing the override of this setting from the mainboard should be straight forward. It's just not necessary at this time. BUG=b:37687843 TEST=BAT test, warm, reboot, S3 cycle test Change-Id: I9a2f7636b46492a9d08472a0752cdf1f86a72e15 Signed-off-by: Ravi Sarawadi Signed-off-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/19397 Reviewed-by: Paul Menzel Reviewed-by: Duncan Laurie Reviewed-by: Furquan Shaikh Tested-by: build bot (Jenkins) --- src/soc/intel/apollolake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/apollolake/Kconfig') diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index dc639a237c..a65bb6d7a8 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -30,6 +30,7 @@ config CPU_SPECIFIC_OPTIONS select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM if RELOCATABLE_RAMSTAGE select COLLECT_TIMESTAMPS select COMMON_FADT + select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS select GENERIC_GPIO_LIB select HAVE_INTEL_FIRMWARE select HAVE_SMI_HANDLER -- cgit v1.2.3