From a2a90a3157abdc812c42a2d24660167729a40df0 Mon Sep 17 00:00:00 2001 From: Sumeet R Pawnikar Date: Mon, 12 Apr 2021 21:30:19 +0530 Subject: soc/intel/alderlake: Add DPTF HIDs for Alder Lake SoC Add DPTF HIDs for thermal funcitonality for Alder Lake SoC. BRANCH=None BUG=None TEST=Built and tested on adlrvp board Change-Id: I8de58497fa800690d04abbdfe4d6abf1c0184334 Signed-off-by: Sumeet R Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/52268 Reviewed-by: Angel Pons Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/Makefile.inc | 1 + src/soc/intel/alderlake/dptf.c | 18 ++++++++++++++++++ 2 files changed, 19 insertions(+) create mode 100644 src/soc/intel/alderlake/dptf.c (limited to 'src/soc/intel/alderlake') diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 5c1617ba91..7252085a1e 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -30,6 +30,7 @@ romstage-y += reset.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c +ramstage-y += dptf.c ramstage-y += elog.c ramstage-y += espi.c ramstage-y += finalize.c diff --git a/src/soc/intel/alderlake/dptf.c b/src/soc/intel/alderlake/dptf.c new file mode 100644 index 0000000000..2af96df5bb --- /dev/null +++ b/src/soc/intel/alderlake/dptf.c @@ -0,0 +1,18 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct dptf_platform_info adl_dptf_platform_info = { + .use_eisa_hids = false, + /* _HID for the toplevel DPTF device, typically \_SB.DPTF */ + .dptf_device_hid = "INTC1041", + /* _HID for Intel DPTF Generic Device (these require PTYP as well) */ + .generic_hid = "INTC1046", + /* _HID for Intel DPTF Fan Device */ + .fan_hid = "INTC1048", +}; + +const struct dptf_platform_info *get_dptf_platform_info(void) +{ + return &adl_dptf_platform_info; +} -- cgit v1.2.3