From 6eaffcdbb13b13aad20a4ea0f06f361432daf713 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Mon, 27 Sep 2021 18:45:10 +0200 Subject: soc/intel: implement ACPI timer disabling per SoC and drop common code MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since it's just a one-liner, implement disabling of the ACPI timer in soc code. This reduces complexity. Change-Id: I434ea87d00f6e919983d9229f79d4adb352fbf27 Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/58020 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/alderlake/Kconfig | 1 - src/soc/intel/alderlake/pmc.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'src/soc/intel/alderlake') diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index e98878f14e..a57d05e660 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -43,7 +43,6 @@ config CPU_SPECIFIC_OPTIONS select PLATFORM_USES_FSP2_2 select PM_ACPI_TIMER_OPTIONAL select PMC_GLOBAL_RESET_ENABLE_LOCK - select PMC_LOW_POWER_MODE_PROGRAM select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c index 4251cd66bd..0d523686d8 100644 --- a/src/soc/intel/alderlake/pmc.c +++ b/src/soc/intel/alderlake/pmc.c @@ -160,7 +160,7 @@ static void soc_pmc_init(struct device *dev) * Disabling ACPI PM timer also switches off TCO */ if (!CONFIG(USE_PM_ACPI_TIMER)) - pmc_disable_acpi_timer(); + setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS); } static void pm1_enable_pwrbtn_smi(void *unused) -- cgit v1.2.3