From 642508aa9c44daaad6963df76630d0271cf0930e Mon Sep 17 00:00:00 2001 From: Hsuan-ting Chen Date: Wed, 27 Oct 2021 10:59:41 +0000 Subject: Reland "vboot_logic: Set VB2_CONTEXT_EC_TRUSTED in verstage_main" This reverts commit adb393bdd6cd6734fa2672bd174aca4588a68016. This relands commit 6260bf712a836762b18d80082505e981e040f4bc. Reason for revert: The original CL did not handle some devices correctly. With the fixes: * commit 36721a4 (mb/google/brya: Add GPIO_IN_RW to all variants' early GPIO tables) * commit 3bfe46c (mb/google/guybrush: Add GPIO EC in RW to early GPIO tables) * commit 3a30cf9 (mb/google/guybrush: Build chromeos.c in verstage This CL also fix the following platforms: * Change to always trusted: cyan. * Add to early GPIO table: dedede, eve, fizz, glados, hatch, octopus, poppy, reef, volteer. * Add to both Makefile and early GPIO table: zork. For mb/intel: * adlrvp: Add support for get_ec_is_trusted(). * glkrvp: Add support for get_ec_is_trusted() with always trusted. * kblrvp: Add support for get_ec_is_trusted() with always trusted. * kunimitsu: Add support for get_ec_is_trusted() and initialize it as early GPIO. * shadowmountain: Add support for get_ec_is_trusted() and initialize it as early GPIO. * tglrvp: Add support for get_ec_is_trusted() with always trusted. For qemu-q35: Add support for get_ec_is_trusted() with always trusted. We could attempt another land. Change-Id: I66b8b99d6e6bf259b18573f9f6010f9254357bf9 Signed-off-by: Hsuan Ting Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/58253 Tested-by: build bot (Jenkins) Reviewed-by: Karthik Ramasubramanian Reviewed-by: Tim Wawrzynczak Reviewed-by: Yu-Ping Wu --- src/soc/intel/alderlake/Makefile.inc | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/intel/alderlake') diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index d857e8b59b..00d857c9f6 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -44,6 +44,8 @@ ramstage-y += vr_config.c ramstage-y += xhci.c ramstage-$(CONFIG_SOC_INTEL_CRASHLOG) += crashlog.c +verstage-y += gpio.c + smm-y += elog.c smm-y += gpio.c smm-y += p2sb.c -- cgit v1.2.3