From 2c805b9afa7abdf630693bbf464fa2d58f89bf1e Mon Sep 17 00:00:00 2001 From: Bora Guvendik Date: Wed, 8 Jun 2022 15:55:52 -0700 Subject: soc/intel/alderlake: Add Kconfig for Raptor Lake Until FSP for RPL and ADL align, mainboards using RPL should select SOC_INTEL_RAPTORLAKE and SOC_INTEL_ALDERLAKE_PCH_* together. Currently, ADL FSP headers and RPL FSP headers differ. Use RPL FSP header with Raptor Lake silicon. This code can be removed once ADL and RPL start using the same FSP. BUG=b:229134437 BRANCH=firmware-brya-14505.B TEST=build adlrvp_rpl_ext_ec Signed-off-by: Bora Guvendik Change-Id: Iaf95352b9cafb81f23522bcf63753d199c0420eb Reviewed-on: https://review.coreboot.org/c/coreboot/+/65051 Tested-by: build bot (Jenkins) Reviewed-by: Nick Vaccaro --- src/soc/intel/alderlake/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/soc/intel/alderlake') diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 0b5328103a..ef1d10b997 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -5,6 +5,12 @@ config SOC_INTEL_ALDERLAKE type using the `SOC_INTEL_ALDERLAKE_PCH_*` options instead of selecting this option directly. +config SOC_INTEL_RAPTORLAKE + bool + help + Intel Raptorlake support. Mainboards using RPL should select + SOC_INTEL_RAPTORLAKE and SOC_INTEL_ALDERLAKE_PCH_* together. + config SOC_INTEL_ALDERLAKE_PCH_M bool select SOC_INTEL_ALDERLAKE @@ -346,6 +352,7 @@ config PRERAM_CBMEM_CONSOLE_SIZE config FSP_HEADER_PATH string "Location of FSP headers" default "src/vendorcode/intel/fsp/fsp2_0/alderlake_n/" if SOC_INTEL_ALDERLAKE_PCH_N + default "src/vendorcode/intel/fsp/fsp2_0/raptorlake/" if SOC_INTEL_RAPTORLAKE default "src/vendorcode/intel/fsp/fsp2_0/alderlake/" config FSP_FD_PATH -- cgit v1.2.3