From 291b58f06e4d9472fa2b8b8ace5b7829fe625d45 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Tue, 10 Nov 2020 10:25:04 -0700 Subject: soc/intel/alderlake: Add soc_get_xhci_usb_info() for elog support Add MMIO offsets for USB2 and USB3 port status registers, for both north (TCSS) and south (PCH) XHCI controllers; implement soc_get_xhci_usb_info() to return the appropriate entries for elog. Change-Id: I5ceb73707a0af0542a07027fd5c873a9658b19d6 Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/47397 Tested-by: build bot (Jenkins) Reviewed-by: Nick Vaccaro Reviewed-by: Furquan Shaikh --- src/soc/intel/alderlake/Makefile.inc | 1 + src/soc/intel/alderlake/xhci.c | 44 ++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+) create mode 100644 src/soc/intel/alderlake/xhci.c (limited to 'src/soc/intel/alderlake') diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index f31cf98dd7..fc3d63e0fa 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -45,6 +45,7 @@ ramstage-y += reset.c ramstage-y += smmrelocate.c ramstage-y += soundwire.c ramstage-y += systemagent.c +ramstage-y += xhci.c smm-y += gpio.c smm-y += p2sb.c diff --git a/src/soc/intel/alderlake/xhci.c b/src/soc/intel/alderlake/xhci.c new file mode 100644 index 0000000000..922633667f --- /dev/null +++ b/src/soc/intel/alderlake/xhci.c @@ -0,0 +1,44 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +/* + * Information obtained from Intel doc# 630094, ADL-P PCH EDS Vol. 2, + * as well as doc# 626817, ADL-P PCH EDS Vol. 1 + */ + +#define PCH_XHCI_USB2_PORT_STATUS_REG 0x480 +#define PCH_XHCI_USB3_PORT_STATUS_REG 0x540 +#define PCH_XHCI_USB2_PORT_NUM 10 +#define PCH_XHCI_USB3_PORT_NUM 4 + +#define TCSS_XHCI_USB2_PORT_STATUS_REG 0x480 +#define TCSS_XHCI_USB3_PORT_STATUS_REG 0x540 +#define TCSS_XHCI_USB2_PORT_NUM 10 +#define TCSS_XHCI_USB3_PORT_NUM 4 + +static const struct xhci_usb_info usb_info = { + .usb2_port_status_reg = PCH_XHCI_USB2_PORT_STATUS_REG, + .num_usb2_ports = PCH_XHCI_USB2_PORT_NUM, + .usb3_port_status_reg = PCH_XHCI_USB3_PORT_STATUS_REG, + .num_usb3_ports = PCH_XHCI_USB3_PORT_NUM, +}; + +static const struct xhci_usb_info tcss_usb_info = { + .usb2_port_status_reg = TCSS_XHCI_USB2_PORT_STATUS_REG, + .num_usb2_ports = TCSS_XHCI_USB2_PORT_NUM, + .usb3_port_status_reg = TCSS_XHCI_USB3_PORT_STATUS_REG, + .num_usb3_ports = TCSS_XHCI_USB3_PORT_NUM, +}; + +const struct xhci_usb_info *soc_get_xhci_usb_info(pci_devfn_t xhci_dev) +{ + if (xhci_dev == PCH_DEVFN_XHCI) + return &usb_info; + else if (xhci_dev == SA_DEVFN_TCSS_XHCI) + return &tcss_usb_info; + + return NULL; +} -- cgit v1.2.3