From 9b0f169d2503dc044500e2790b987d766928782a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Thu, 5 May 2022 13:21:01 +0200 Subject: soc/intel/alderlake/hsphy: Add support for HSPHY firmware loading MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit BIOS must send the IP_LOAD HECI command to fetch the firmware for CPU PCIe Gen5 and upload it via CPU REG BAR prior FSP Silicon Init. Implementation based on public Slimbootloader's "Silicon/AlderlakePkg/Library/CpuPcieHsPhyInitLib". TEST=Boot MSI PRO Z690-A and see the HSPHY FW is loaded. PCIe x16 Gen3 GPU card started working in the PCIE 5.0 slot. [DEBUG] HECI: Sending Get IP firmware command [DEBUG] HECI: Get IP firmware success. Response: [DEBUG] Payload size = 0x6944 [DEBUG] Hash type used for signing payload = 0x3 Signed-off-by: Michał Żygowski Change-Id: I6c6c11581e3d3d9bab0131fae6ef487cafe98080 Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/64074 Tested-by: build bot (Jenkins) Reviewed-by: Tim Crawford Reviewed-by: Stefan Reinauer --- src/soc/intel/alderlake/include/soc/hsphy.h | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 src/soc/intel/alderlake/include/soc/hsphy.h (limited to 'src/soc/intel/alderlake/include') diff --git a/src/soc/intel/alderlake/include/soc/hsphy.h b/src/soc/intel/alderlake/include/soc/hsphy.h new file mode 100644 index 0000000000..9974afea64 --- /dev/null +++ b/src/soc/intel/alderlake/include/soc/hsphy.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_ALDERLAKE_HSPHY_H_ +#define _SOC_ALDERLAKE_HSPHY_H_ + +void load_and_init_hsphy(void); + +#endif /* _SOC_ALDERLAKE_HSPHY_H_ */ -- cgit v1.2.3