From b3ced6a67b6f950d06bebf413d98218969b75b57 Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 4 Aug 2020 13:34:03 +0530 Subject: soc/intel/alderlake/bootblock: Do initial SoC commit till bootblock List of changes: 1. Add required SoC programming till bootblock 2. Include only required headers into include/soc 3. Add CPU/PCH/SA EDS document number and chapter number 4. Include ADL-P related DID, BDF Signed-off-by: Subrata Banik Change-Id: I204e692fabb84fce297bebee465f4ca624c6fe56 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44857 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/alderlake/bootblock/cpu.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 src/soc/intel/alderlake/bootblock/cpu.c (limited to 'src/soc/intel/alderlake/bootblock/cpu.c') diff --git a/src/soc/intel/alderlake/bootblock/cpu.c b/src/soc/intel/alderlake/bootblock/cpu.c new file mode 100644 index 0000000000..4225358de5 --- /dev/null +++ b/src/soc/intel/alderlake/bootblock/cpu.c @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * This file is created based on Intel Alder Lake Processor PCH Datasheet + * Document number: 621483 + * Chapter number: 7 + */ + +#include +#include + +void bootblock_cpu_init(void) +{ + /* + * Alderlake platform doesn't support booting from any other media + * than SPI flash and on IA platform SPI is memory mapped hence + * enabling temporary caching of memory-mapped spi boot media. + */ + fast_spi_cache_bios_region(); +} -- cgit v1.2.3