From 8407c3464c9f1cbe13288a5eda9fa4be7e70020c Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Wed, 8 Sep 2021 20:15:36 +0530 Subject: soc/intel/alderlake: Select SOC_INTEL_COMMON_BLOCK_TCSS at SoC level This patch selects SOC_INTEL_COMMON_BLOCK_TCSS from Alder Lake SoC Kconfig and drops SOC_INTEL_COMMON_BLOCK_TCSS Kconfig selection from specific mainboard (brya) to ensure all Alder Lake mainboards can make use of common TCSS block. BUG=b:187385592 TEST=Type-C pendrive/Gen-2 SSD detected as Super speed. Change-Id: I85f6a967eb34ea760418131a9586bfdeb13c9b5d Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/57505 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Tim Wawrzynczak Reviewed-by: Angel Pons --- src/soc/intel/alderlake/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/alderlake/Kconfig') diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index c75753ba23..0b28938401 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -68,6 +68,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP + select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_COMMON_BLOCK_USB4 select SOC_INTEL_COMMON_BLOCK_USB4_PCIE select SOC_INTEL_COMMON_BLOCK_USB4_XHCI -- cgit v1.2.3