From 0aed4e577df03a3c9c790fddebb1a9c413a0abcb Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Mon, 12 Oct 2020 17:27:31 +0530
Subject: soc/intel/alderlake: Enable TME for Alder Lake

List of changes:
1. Select CONFIG_INTEL_TME from SoC Kconfig
2. Set TmeEnable FSP-M UPD based on Kconfig.

TEST=Able to build and boot ADLRVP and verified from Chrome OS
that TME is enable.

Change-Id: I6992957bd2999a2efbae7b6d9c825c43bd118f72
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46296
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/alderlake/Kconfig | 1 +
 1 file changed, 1 insertion(+)

(limited to 'src/soc/intel/alderlake/Kconfig')

diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index 3f500f33cf..2d21a61193 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -25,6 +25,7 @@ config CPU_SPECIFIC_OPTIONS
 	select INTEL_GMA_ACPI
 	select INTEL_GMA_ADD_VBT if RUN_FSP_GOP
 	select IOAPIC
+	select INTEL_TME
 	select MRC_SETTINGS_PROTECT
 	select PARALLEL_MP
 	select PARALLEL_MP_AP_WORK
-- 
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