From c6fe265f68c65053f908248128347f4b860afc4e Mon Sep 17 00:00:00 2001 From: Nico Huber Date: Sat, 6 Oct 2018 18:41:44 +0200 Subject: soc/imgtech/pistachio: Convert to `board_reset()` Change-Id: If8fc29c46e2cbc69f94ea8b6dc414a93d82ffb28 Signed-off-by: Nico Huber Reviewed-on: https://review.coreboot.org/29050 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner --- src/soc/imgtec/pistachio/Kconfig | 1 - src/soc/imgtec/pistachio/reset.c | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'src/soc/imgtec') diff --git a/src/soc/imgtec/pistachio/Kconfig b/src/soc/imgtec/pistachio/Kconfig index 1ce488c35b..333216d15d 100644 --- a/src/soc/imgtec/pistachio/Kconfig +++ b/src/soc/imgtec/pistachio/Kconfig @@ -23,7 +23,6 @@ config CPU_IMGTEC_PISTACHIO select HAVE_MONOTONIC_TIMER select HAVE_UART_SPECIAL select GENERIC_GPIO_LIB - select HAVE_HARD_RESET select UART_OVERRIDE_REFCLK bool diff --git a/src/soc/imgtec/pistachio/reset.c b/src/soc/imgtec/pistachio/reset.c index c0e9105abf..d5d0a8188d 100644 --- a/src/soc/imgtec/pistachio/reset.c +++ b/src/soc/imgtec/pistachio/reset.c @@ -20,7 +20,7 @@ #define PISTACHIO_WD_ADDR 0xB8102100 #define PISTACHIO_WD_SW_RST_OFFSET 0x0000 -void do_hard_reset(void) +void do_board_reset(void) { /* Generate system reset */ write32(PISTACHIO_WD_ADDR + PISTACHIO_WD_SW_RST_OFFSET, 0x1); -- cgit v1.2.3